(1) Field of the Invention
The present invention relates to a time division multiple access communication system based upon a communication mode or method, called TDMA communication, a signal receiving method to be taken for the time division multiple access communication system, and a center unit to be employed for the time division multiple access communication system.
(2) Description of the Related Art
FIG. 43 is a block diagram showing one example of two-way (bidirectional) CATV (CAble TeleVision) system involving a TDMA communication mode. This two-way CATV system 1xe2x80x2 shown in FIG. 43 is basically composed of a plurality of subscriber""s units (that is, CAUs: Communication Access Units) 4-1 to 4-N (N denotes a natural number not less than 2) each being a home-use device and including terminals, such as a telephone set 5, a personal computer 6 and/or others, and a center unit (that is, CAM: Communication Access Master) 2xe2x80x2 accommodating these CAUs 4-i (where i=1 to N) through a head end (HE) unit 7 and a necessary transmission line 8 such as a coaxial cable to execute centralized control of a TDMA communication protocol between the switching node 3 side and the CAU 4-i side.
In some cases, as indicated by a broken line in FIG. 43, in place of the telephone set 5, a personal computer 6xe2x80x2 different from the aforesaid personal computer 6 is connected through a modem 6a to the foregoing CAU 4-i. In addition, when necessary, a desired communication network (in this case, a packet communication network dealing with packet data) such as a LAN (Local Area Network) 9 can be connected through a LAN transmission line 13 to the foregoing CAM 2xe2x80x2. Moreover, according to circumstances, in addition to a router 10 and a server 11 for the LAN 9, a maintenance console (MC) 12 which monitors the operating status of the CAM 2xe2x80x2 and the CAU 4-i or the like is connected to the LAN transmission line 13.
Furthermore, as shown in FIG. 43, the CAM 2xe2x80x2 comprises an interface section (PRI: Primary Rate Interface) 20 including a plurality of ISDN trunk cards 21, a network (NW) circuit 22, a frame assembling section (FRMA1: FRaMe Assemble 1) 23, a modulation section (MOD1) 24, demodulation sections (DEM1) 25, a frame disassembling section (FRMD1: FRaMe Disassemble 1) 26xe2x80x2, a central processing unit (CPU1) 27, a non-volatile memory 27A, a volatile memory 27B, a LAN controller (LANC) 28, and other units. Further, each of CAUs 4-i is made up of a multiplexing and demultiplexing unit (WD) 41, a demodulation section (DEM2) 42, a frame disassembling section (FRMD2) 43, a single line interface (SLI) section 44, a frame assembling section (FRMA2) 45, a modulation section (MOD2) 46, a central processing section (CPU 2) 47, a non-volatile memory 47A, a volatile memory 47B, a data communication control unit 48, and others.
In the CAM 2xe2x80x2, each of the trunk cards 21 constituting the interface section 20 is for interfacing with the switching node 3 side by converting a protocol (format) of a signal transmitted or received between the switching node 3 side and the CAM 2xe2x80x2 side into a protocol suitable for each side, and the network circuit 22 is for conducting a switching operation of voice data (or personal computer data) between the switching node 3 and the telephone set 5 (or the personal computer 6), and is under control of the CPU 27.
The frame assembling section 23 assembles voice data (B channel) transmitted from each of the trunk cards 21 through the network circuit 22, a control signal (M channel, D channel) produced in the CPU 27 and packet data (C channel) transmitted from the LAN 9 through the LAN controller 28 into a TDMA signal (down-frame) having a frame format shown in FIG. 45.
This down-frame shown in FIG. 45 is made to be transmitted in the order from the left and upper side (time slot (TS) number=00, frame number=00) to the rightward direction (the direction that the TS number becomes higher) and the downward direction (the direction that the frame number becomes higher). In this case, a channel (data) corresponding to one frame [128 time slots (0 to 127) (1 time slot=8 bits)] is transmitted for 125 xcexcs, and a channel corresponding to 1 multiframe (32 frames) is sent for 4 ms (=125 xcexcsxc3x9732), thus providing a frame configuration with a transmission rate of 128 (TS)xc3x978 (bits)xc3x9732 (frames)÷4 ms=8.192 Mbps.
Incidentally, in FIG. 45, F represents a frame bit showing a bit pattern indicative of the head of each frame, while MF designates a multiframe bit showing a bit-pattern representative of the head of a multiframe. The CAU 4-i establishes the bit synchronization with the CAM 2xe2x80x2 on the basis of this down-frame, and synchronizes in multiframe on the basis of the MF.
Furthermore, an M channel (which will sometimes be referred hereinafter to as an Mch) primarily serves as a control channel to be used for when the CAM 2xe2x80x2 measures the distance from the CAU 4-i and establishes the communication synchronization with the CAU 4-i. Concretely, when the transmission or reception of an M channel takes place with respect to a CAU 4-i which is not in the synchronized relation, the CAM 2xe2x80x2 measures the delay of the transmission and reception timing (time-difference information) in the M channel occurring in accordance with the distance from the CAU 4-i (the length of the transmission line 8), and informs the CAU 4-i of that delay through the M channel, so that the CAU 4-i corrects its own signal transmission timing to establish the communication synchronization with the CAM 2xe2x80x2. As will be described herein later, the M channel is additionally used for a C-channel transmission halt request to the registered CAU 4-i or a periodical inquiry about the status (the turning-on/off of a power supply or the like) to the CAU 4-i.
Still further, a D channel (which will sometimes be referred hereinafter to as a Dch) serves as a calling process control channel between the switching node 3 and the CAM 2xe2x80x2, and exchanges such as the transmission/reception about the telephone set 5 (or the personal computer 6) and the notification of an available B channel are done through this D channel. Further, a C channel (which will sometimes be referred hereinafter to as a Cch) acts as a packet communication channel, and is put to use for the transmission of packet data between the LAN 9 connected to the CAM 2xe2x80x2 and the personal computer 6 connected to the CAU 4-i.
Moreover, a B channel (which will sometimes be referred hereinafter to as a Bch) is a channel for voice (sound) or data communication, and is put to use for the transmission of the voice (sound) data of the telephone set 5 (or the data of the personal computer 6xe2x80x2) through the CAU 4-i. In this case, the B channel assuming 64 kbps (=8 bits÷125 xcexcs) per frame (125 xcexcs) is transmittable by a quantity corresponding to 95 channels (B0 to B94), which allows a maximum of 95 CAUs 4-i to simultaneously perform the communication. However, in the case of the ordinary communication, the simultaneous communication by the 95 CAUs 4-i is not very liable, and a free B channel is used properly. Accordingly, in this case, the CAM 2xe2x80x2 can accommodate about 1000 CAUs 4-i.
Besides, the CPU 27 is made to give an ID (identification information) on the CAU 4-i, being the other party in the communication, to each of the aforesaid M channel, D channel and C channel, and as will be mentioned herein later, the CAU 4-i refers to each of the M channel, the D channel and the C channel it receives, and, when being addressed to its own, takes the channel data thereof and communicates it to the CPU 47.
Referring again to FIG. 43, the modulation section 24 modulates a down-frame created in the frame assembling section 23 by QPSK (Quadri-Phase Shift Keying) and further up-converts it into a radio-frequency (RF) signal. Further, in the head end unit 7 functioning as a two-way distributor, the down-frame up-converted is distributed to the transmission line 8 side, and then transmitted toward the CAU 4-i.
The demodulation sections 25 down-convert an up-frame (which will be mentioned later with reference to FIG. 46) coming from the CAU 4-i through the transmission line 8 and the HE unit 7, and QPSK-demodulate it. In this case, in the CAU 4-i, an up-frame including a B channel corresponding to a maximum of 24 channels (B0 to B23) is modulated with four types of frequencies, and the CAM2xe2x80x2 receives it as a signal having a B channel corresponding to 95 channels (one channel is not put to use). For this reason, the four demodulation sections 25 exist corresponding to the respective frequencies.
The frame disassembling section 26xe2x80x2 is for disassembling the up-frame demodulated in the aforesaid demodulation sections 25 into an M channel, a C channel, a D channel and a B channel, with the B channel data being transmitted through the network circuit 22 to the trunk card 21 side while the data of each of the M channel, the C channel and the D channel being outputted to the CPU 27.
Thus, concretely, each of the demodulation sections 25 is, as shown in FIG. 44, composed of a mixer (MIX) 25-1, a local oscillator (LO) 25-2, A/D (analog/digital) converters 25A-3 and 25B-3, a QPSK demodulator 25-4, a bit timing recovery (BTR) section 25-5, and a clock selection switch 25-6. The frame disassembling section 26xe2x80x2 is made up of a channel demultiplexing section (DMPX) 26-1 including registers 26a to 26d for holding the B, M, C and D channel data, respectively, a timing generator (TG) 26-2, and a clock controller 26-3xe2x80x2.
In each of the demodulation sections 25, the mixer 25-1 mixes a signal (carrier regenerative signal) from the local oscillator 25-2 with a received signal (up-frame) from the CAU 4-i to separate the received signal into an in-phase component (I signal) and an orthogonal component (Q signal). Further, the A/D converters 25A-3 and 25B-3 sample the I and Q signals (analog signals) obtained by the mixer 25-1 in accordance with a sampling clock (ADCK) fed from the switch 25-6 to convert the I and Q signals into digital signals (I and Q sampled data), respectively.
The QPSK demodulator 25-4 is for demodulating an inputted signal (QPSK signal) on the basis of the phase difference between the I and Q sampled data obtained by the A/D converters 25A-3 and 25B-3, and the BTR section 25-5 is for detecting the reception of the M channel on the basis of the I and Q sampled data. This BTR section 25-5 is designed to measure the signal levels of the I and Q sampled data obtained in a manner that a clock (DCKM) with a frequency twice that of a system basic clock (CKM) is used as the sampling clock (ADCK), thus detecting the reception of the M channel with a high accuracy. A clock synchronizing with the signal receive timing (in other words, the signal transmission timing in the CAU 4-i) on that occasion is produced as an M-channel receive clock (CKS).
The clock selection switch 25-6 is for selecting (switching) the sampling clock (ADCK) to be supplied to the A/D converters 25A-3 and 25B-3. As will be mentioned herein later, it selects the system basic clock (CKM) as the sampling clock (ADCK) at the normal communication (after the establishment of the synchronization), and selects the aforesaid clock (DCKM) with a frequency twice that of the system basic clock (CKM) as the sampling clock (ADCK) for the M channel receive detection (M channel clock recovery) in the case of the detection of the reception of the M channel, and further, selects the M-channel receive clock (CKS), produced in the BTR section 25-5, as the sampling clock (ADCK) in the case of the reception of the M channel.
Meanwhile, in the frame disassembling section 26xe2x80x2, the channel demultiplexing section 26-1 perceives the frame timing of the data demodulated in the QPSK demodulator 25-4 on the basis of a multiframe clock (MFCK) indicative of the head of a multiframe produced by the TG 26-2 and the system basic clock (CKM), and demultiplexes the demodulated data into M, C, D and B channel data in accordance with that frame timing.
Incidentally, this demultiplex processing is accomplished by detecting a peculiar unique word (UW) at every channel data in an up-frame which will be described herein later with reference to FIG. 46. Further, each of the demultiplexed channel data is temporarily stored in the corresponding one of the registers 26a to 26d, and the M, C and D channel data are communicated to the CPU 27 at an appropriate timing, while the B channel data is transmitted through the network circuit 22 to the switching node 3 side.
The TG 26-2 is for producing the aforesaid multiframe clock (MFCK), system basic clock (CKM) and M-channel receive detection clock (DCKM), and the clock controller 26-3xe2x80x2 perceives the frame timing on the basis of the multiframe clock (MFCK) and system basic clock (CKM) coming from the TG 26-2, and creates a clock control signal (CKCNT) which controls the clock selection processing in the switch 25-6 to supply one of the aforesaid clocks (CKM, DCKM, CKS) as the sampling clock (ADCK) to the A/D converters 25A-3 and 25B-3.
For instance, in the case of the M channel coming from the CAU 4-i, irrespective of the establishment or no establishment of the synchronization, there is a possibility that its receive timing varies in accordance with the distance from the CAU 4-i, the clock controller 26-3xe2x80x2 outputs a selection instructing signal of the clock (CKS) as the aforesaid clock control signal for a given time period called xe2x80x9cM channel windowxe2x80x9d which will be mentioned herein later in order to sample and reproduce a received signal with the clock (CKS) synchronizing with the signal transmission timing of the CAU 4-i, and if the BTR section 25-5 recognizes that the signal level of the M channel is in a normal condition, the clock controller 26-3xe2x80x2 issues the output signal [clock (CKS)] of the BTR section 25-5 which is in a synchronizing relation to the signal transmitted from the CAU 4-i.
On the other hand, since the C, D and B fixed channels (service channels) transmitted at a given timing from the CAU 4-i which is in the synchronized condition can be sampled with the system basic clock (CKM), the clock controller 26-3xe2x80x2 is made to output the selection instructing signal of the clock (CKM) as the clock control signal (CKCNT).
Furthermore, in FIG. 43, the CPU 27 runs the centralized control of the TDMA communication in the CAM 2xe2x80x2, and mainly provides the following functions (1) to (6):
(1) a call control function using the D channel between the switching node 3 and the CAM 2xe2x80x2;
(2) a distance measuring function using the M channel between the CAM 2xe2x80x2 and the CAU 4-i;
(3) a call control function using the D channel between the CAM 2xe2x80x2 and the CAU 4-i;
(4) a communication function with the maintenance console 12 through the use of the LAN 9;
(5) a function of converting packet data obtained through the LAN controller 28 into C channel data to insert it into a down-frame to the CAU 4-i; and
(6) a function of converting C channel data within an up-frame coming from the CAU 4-i into packet data to transmit it to the LAN 9 side.
Needless to say, the data such as software necessary for the operation of the CPU 27 and terminal IDs, which are needed to continuously retain irrespective of the turning-off of the power to the CAM 2xe2x80x2, are stored in the non-volatile memory 27A, while the data such as flags and parameters necessary for the aforesaid various processing, which are to be initialized in response to the turning-off of the power to the CAM 2xe2x80x2, are put in the volatile memory 27B.
The LAN controller 28 is controlled by the CPU 27 for taking charge of the control of the packet data given or taken between the LAN 9 and the CAM 2xe2x80x2.
Meanwhile, in the CAU 4-i, the distributor 41 serves as a two-way distributor having an up/down band-pass filter, and outputs a down-frame from the CAM 2xe2x80x2 to the demodulation section 42 while outputting an up-frame from the modulation section 46, to be transmitted to the CAM 2xe2x80x2, to the transmission line 8.
Furthermore, the demodulation section 42 down-converts a down-frame (RF signal) from the CAM 2xe2x80x2 for the QPSK demodulation, and the frame disassembling section 43 disassembles the down-frame into the M, D, C and B channel data. At this time, if the ID of the M channel, the D channel or the C channel shows itself, that channel data is communicated to the CPU 47. In terms of the B channel, if the notice of the use of that B channel takes place through the D channel from the CAM 2xe2x80x2, the B channel is supposed to be outputted through the SLI section 44 to the telephone set 5 (or outputted through the modem 6a to the personal computer 6xe2x80x2).
Besides, this frame disassembling section 43 includes a register 431 for a registration flag f1 comprising 8 bits, for example, shown in FIG. 51, and if the frame-synchronization and bit-synchronization with the CAM 2xe2x80x2 are established in a manner which will be described herein later, the data (xe2x80x9c1xe2x80x9d) representative of the established synchronization (the completion of the registration) is set as the registration flag f1 in its least significant bit d0 (LSB) through the CPU 47. However, this registration flag f1 is reset when the down-frame becomes out of the multiframe-synchronization and the bit-synchronization at the turning-on of the power (that is, xe2x80x9c0xe2x80x9d is written therein).
The SLI section 44 functions as a subscriber""s interface, that is, transmits the B channel data (voice data) from the frame disassembling section 43 to the telephone set 5 (or through the modem 6a to the personal computer 6xe2x80x2) while outputting voice data from the telephone set 5 (or personal computer data coming from the personal computer 6xe2x80x2 through the modem 6a) to the frame assembling section 45 so that it is transmitted as an up-frame to the CAM 2xe2x80x2.
Furthermore, the frame assembling section 45 allocates the B channel data from the SLI section 44 to one of time slots B0 to B23 designated by the CPU 47, and in the case of receiving the M channel and the D channel from the CPU 47 and in the case of receiving packet data as the C channel data from the personal computer 6 through the LAN controller 48, allocates the M channel data, the C channel data and the D channel data to the corresponding time slots, respectively, thereby assembling an up-frame shown in FIG. 46 as a transmission signal to the CAM 2xe2x80x2.
In FIG. 46, xe2x80x9cM channel (Mch) windowxe2x80x9d denotes the time (variation) width (range: M channel variation allowable period) of the timing that the M channel transmitted from the CAU 4-i is received in the CAM 2xe2x80x2, and this time width is set on the basis of the distance from the CAU 4-i being at a location remotest from the CAM 2xe2x80x2.
For instance, assuming that the distance between the CAM 2xe2x80x2 and the CAU 4-i remotest from the CAM 2xe2x80x2 is taken to be Lmax (km) and the delay time per 1 m of the transmission line 8 (coaxial cable) is taken as tx [ns (nano-second)], the time width MWIN of xe2x80x9cM channel windowxe2x80x9d is given as follows.
MWIN=Lmax(km)xc3x97tx(ns)xc3x972=2Lmaxxc2x7tx(xcexcs)
Further, adding the M channel data length nM (xcexcs) (nM depicts an actual number equals to or greater than 0) thereto creates the following equation.
MWIN=2Lmaxxc2x7tx+nM(xcexcs)
Moreover, as shown in FIGS. 47 to 49, each of the aforesaid M channel, C channel and D channel is configured to have a guard timing (G), a preamble (PR), a unique word (UW), a terminal ID, a data (DATA) part and a cyclic redundancy check (CRC) code, and as shown in FIG. 50, the B channel is structured to include a guard timing (G), a preamble (PR), a unique word (UW) and a data (DATA) part.
In these channels, the guard timing (G) is a signal which functions as a buffer time for, even if the CAU 4-i makes an error (several bits) about the M channel transmission timing, avoiding the influence on the channels before and after the M channel, with the transmission of the carrier (carrier signal) in the CAU 4-i being stopped during the guard timing. Further, the preamble (PR) is a signal (synchronization-bit) to be used for when the CAM 2xe2x80x2 synchronizes with a signal from the CAU 4-i. For instance, a repetitive signal such as xe2x80x9c0011xe2x80x9d is transmitted therefor.
The unique word (UW) is a signal indicative of the end of the preamble (PR) and the head of the data (DATA) part, and when detecting this signal, the CAM 2xe2x80x2 starts the reception of the data (DATA) part. Further, the terminal ID is a signal to be used for when the CAM 2xe2x80x2 checks which CAU 4-i originates the received signal, and accordingly, a unique terminal ID is allocated to each of the CAUs 4-i.
The CRC is providing a function to detect an error (code error) about the received channel data in the CAM 2xe2x80x2, and if an error is detected in the CAM 2xe2x80x2 after the CRC processing, that channel data (DATA part) is treated as invalid data and a data re-transmission request is issued to the corresponding CAU 4-i. At this time, in response to the re-transmission request, the CAU 4-i again transmits the same data.
Incidentally, the reason why the B channel does not include the terminal ID as shown in FIG. 50 is that the CAM 2xe2x80x2 can identify the CAU 4-i which originates the B channel it receives, since the time slot of the B channel each of the CAUs 4-i uses is reported through the D channel to the CAM 2xe2x80x2. In addition, the reason why there is no CRC code in the B channel is that the control on the CAM 2xe2x80x2 becomes very complicated and difficult, with the re-transmission request caused by the communication error at the data communication using the B channel being usually done at end-end points in an upper layer.
Moreover, in FIG. 43, the modulation section 46, only in the case of receiving a signal from the frame assembling section 45, modulates that signal by QPSK and up-converts it into an RF signal to send the RF signal to the CAM 2xe2x80x2. In the case that there is the absence of a signal to be transmitted (including a condition during the aforesaid guard timing), the transmission of the carrier signal is also made to stop.
Furthermore, the CPU 47 is for conducting the centralized control of the TDMA communication in the CAU 4-i, and fulfills the following functions (1) to (4):
(1) a distance control function using the M channel;
(2) a call control function using the D channel;
(3) a LAN communication control function using the C channel; and
(4) an SLI control function.
In this case, this CPU 47 monitors the registration flag f1 set in the aforesaid register 431 (see FIG. 51), and when the registration flag f1 shows xe2x80x9c0xe2x80x9d, outputs only an instruction for the transmission of the M channel to the frame assembling section 45, and when xe2x80x9c1xe2x80x9d constituting the registration flag f1 is written in the register 431, issues an instruction for the transmission of the M channel, the C channel, the D channel or the B channel to the frame assembling section 45 when necessary.
Besides, even in this case, the software necessary for the operation of the CPU 47, the terminal IDs and others are stored in the non-volatile memory 47A, while the flags, parameters and others necessary for the aforesaid various processing are put in the volatile memory 47B.
Secondly, a description will be made hereinbelow of an operation of the two-way CATV system 1xe2x80x2 thus arranged.
First of all, let it be assumed that a down-frame is transmitted from the CAM 2xe2x80x2 toward the CAU 4-i at a timing shown, for example, in (a) of FIG. 54. In this case, as shown in (c) of FIG. 54, the CAU 4-i receives the down-frame from the CAM 2xe2x80x2 with a delay time equivalent to the distance from the CAM 2xe2x80x2.
In addition, in this state, assuming that, at time t0 in (a) of FIG. 54, the CAM 2xe2x80x2 sets up a xe2x80x9cresponse request signalxe2x80x9d in the M channel (DATA part) of the down-frame and transmits it in order to establish the synchronization with the CAU 4-i which is not in a synchronizing condition yet (step B1 in FIG. 53), the CAU 4-i receives this M channel, for example, at time t1 shown in (c) of FIG. 54, and informs the CPU 47 of it.
Since the xe2x80x9cresponse request signalxe2x80x9d is set in the contents (DATA) of the informed M channel, the CPU 47 sets up a xe2x80x9cresponse signalxe2x80x9d in the M channel (DATA) of an up-frame to the CAM 2xe2x80x2, and transmits the up-frame (M channel) to the CAM 2xe2x80x2 at a receive timing (time t2) of the next down-frame, for example, as shown in (d) of FIG. 54 (step B2 in FIG. 53).
Meanwhile, at this time, in the frame disassembling section 26xe2x80x2 of the CAM 2xe2x80x2, at every head timing (every 4 ms) of the down-frame (multiframe), the clock controller 26-3xe2x80x2 monitors whether or not the M channel is received from the CAU 4-i within the aforesaid xe2x80x9cM channel windowxe2x80x9d, and further conducts the above-mentioned clock switching processing in accordance with the detection of the reception of the M channel.
For instance, as shown in FIG. 52, assuming that the start time of the M channel window (the head timing of the down-multiframe) is taken as tM0 and the end time of the M channel window (the time of receiving the C channel from the CAU 4-i where the synchronization is established) is taken as tC0, the clock controller 26-3xe2x80x2 monitors whether or not the present time t reaches the time tM0 (step A1, NO route from step A1). In this case, the clock controller 26-3xe2x80x2 is equipped with a non-shown timer counter to take the present time t, and compares the present time t taken by this timer counter with the aforesaid time tM0 (tC0) to know the time tM0 (tC0).
Furthermore, at the time tM0, the clock controller 26-3xe2x80x2 controls the switch 25-6 to supply the M-channel receive detection clock (DCKM) as the sampling clock (ADCK) for the A/D converters 25A-3 and 25B-3 (ADCK←DCKM: from step A1 through its YES route to step A2, see FIGS. 59 and 60). At this time, the counter value (the present time t) of the timer counter is incremented by one (t←t+1: step A3).
In this state, the clock controller 26-3xe2x80x2 checks whether or not the present time t reaches the time tC0 (step A4). If not reaching the time tC0 (NO decision in step A4), the BTR section 25-5 decides, on the basis of the I and Q sampled data, whether the signal level representative of the reception of the M channel is detected (inputted) or not (step A5).
If this decision result shows no level detection (NO decision in step A5), the clock controller 26-3xe2x80x2 repeatedly conducts the above-mentioned step A3 and following steps while the BTR section 25-5 monitors whether or not to detect the signal level indicative of the reception of the M channel [NO route from step A5, see (a) to (c) of FIG. 59].
In this case, for example, assuming that, as shown in (a) of FIG. 54, the M channel transmitted from the CAU 4-i at the time t2 [see (d) of FIG. 54] is received at the time t3 (t2 less than t3 less than tC0) and the signal level indicative of the reception of the M channel is detected within the xe2x80x9cM channel windowxe2x80x9d [see (c) of FIG. 60], the clock controller 26-3xe2x80x2 controls the switch 25-6 to switch (set) the sampling clock (ADCK) to the M channel receive clock (CKS) produced in synchronism with the inputted signal in the BTR section 25-5 as shown in (b) of FIG. 60 (ADCK←CKS: step A6). At this time, the counter value (the present time t) of the timer counter is further incremented by one (t←t+1: step A7).
Whereupon, the A/D converters 25A-3 and 25B-3 sample the inputted QPSK-demodulated signal in accordance with the M channel receive clock (CKS) to obtain the I and Q sampled data of the M channel. The I and Q sampled data obtained is demodulated and reproduced in the QPSK demodulation section 25-4 (step A8) and then outputted as the demodulated data to the channel demultiplexing section 26-1.
The channel demultiplexing section 26-1 refers to the unique word (UW) of the demodulated data inputted to identify that the demodulated data is the M channel, and stores the aforesaid DATA part subsequent to that UW in the Mch register 26b, and further, informs the clock controller 26-3xe2x80x2 of the completion of the reception of the M channel at the time of the completion of the storage of the DATA part therein, while informing the CPU 27 of the M channel data (from step A9 through its YES route to step A10).
Subsequently, the CPU 27 checks, on the basis of the multiframe clock (MFCK) from the TG 26-2, the difference of the receive timing of the informed M channel data from the head of the multiframe, that is, calculates (measures) the delay time td [see (b) of FIG. 54] of the response signal from the CAU 4-i, and further sets that delay time td in the M channel of the down-frame at the timing [time t4 in (a) of FIG. 54] corresponding to the next multiframe clock (MFCK) and transmits the resultant to the CAU 4-i (distance correction+response request signal: step B3 in FIG. 53).
At this time, as the CAU 4-i lies at a position closer to the CAM 2xe2x80x2, the M channel data (response) reaches more quickly to the CAM 2xe2x80x2 so that the delay time td becomes shorter [see (a) to (d) of FIG. 55]. On the contrary, as the CAU 4-i stands at a location remoter therefrom, the M channel data reaches later to the CAM 2xe2x80x2 so that the delay time td becomes longer [see (a) to (d) of FIG. 56]. For this reason, as mentioned before, the xe2x80x9cM channel windowxe2x80x9d is required by a time width corresponding to the maximum distance (for example, 20 km) between the CAM 2xe2x80x2 and the CAU 4-i.
On the other hand, at this time, on receiving the M channel receive completion notification from the channel demultiplexing section 26-1, the clock controller 26-3xe2x80x2 continuously monitors the present time t while incrementing the counter value of the timer counter (NO route from step A11) until the present time t reaches the time tC0 (until the decision in Step A11 shows xe2x80x9cYESxe2x80x9d). When the present time t reaches the time tC0, the clock controller 26-3xe2x80x2 controls the switch 25-6 to switch the sampling clock (ADCK) to the system basic clock (CKM) (from step A11 through its YES route to step A13), thus returning to the initial condition.
In the case of no completion of the M channel reception in the step A9, the clock controller 26-3xe2x80x2 monitors whether or not the present time t reaches the time tC0 (from step A9 through its NO route to step A14), and while the time tC0 does not come, it repeatedly conducts the aforesaid step A7 and following steps (NO route from step A14), and when the time tC0 is reached, that is, since it is the end time of the xe2x80x9cM channel windowxe2x80x9d, it controls the switch 25-6 to switch the sampling clock (ADCK) to the system basic clock (CKM), then going back to the initial condition (from step A14 through its YES route to step A13).
Meanwhile, in the CAU 4-i, when receiving the M channel where the aforesaid delay time td is set therein, as indicated by the time t6 in (d) of FIG. 54, the CPU 47 again transmits the M channel as its response signal to the CAM 2xe2x80x2 at a timing earlier by the delay time td than the transmission at the time t2 in (d) of FIG. 54 (step B4 in FIG. 53).
At the time of receiving the M channel from this CAU 4-i, if the delay time td disappears (td=0: that is, the synchronization is established) as indicated at the time t7 in (b) of FIG. 54, the CAM 2xe2x80x2 informs the CAU 4-i of that effect or fact (distance-OK) through the use of the M channel (step B5 in FIG. 53). In the CAU 4-i, when receiving this distance-OK notification, the CPU 47 sets, to the frame assembling section 23, the condition that the use (transmission) of the M, C, D and B channels are possible (which is referred to as a registration). Whereupon, the CAU 4-i can transmit the M, C, D and B channels in synchronism with the head timing of the multiframe in the CAM 2xe2x80x2 (step B6 in FIG. 53).
Thus, the CAM 2xe2x80x2 can receive the M channel from the CAU 4-i at the head timing of the down-multiframe, and can establish the frame-synchronization and bit-synchronization between the up-frame from the CAU 4-i and the down-frame to the CAU 4-i. Accordingly, in the normal communications between the CAM 2xe2x80x2 and the registered CAU 4-i, the head of the up-frame from the CAU 4-i always lies at the head of the down-multiframe.
In other words, although it is difficult to know the position of the M channel data, to be returned from the CAU 4-i which is to be newly registered (non-registered), in the xe2x80x9cM channel windowxe2x80x9d (the timing at which the reception occurs), all the up-frames from the registered CAU 4-i which once measures the delay time gather at the head timing of the down-multiframe irrespective of the distance from the CAM 2xe2x80x2 as shown in (a) to (d) of FIG. 57 and (a) to (d) of FIG. 58.
As described above, in the two-way CATV system 1xe2x80x2, the synchronization establishing signals (response signal, response, distance correction, and others) for accomplishing the establishment of the synchronization in the TDMA communication between the CAM 2xe2x80x2 and the CAU 4-i are given and taken (communicated) through the M channels therebetween, so that the CAU 4-i controls its own transmission timing to establish the synchronization in the TDMA communication with respect to the CAM 2xe2x80x2.
Incidentally, the service offering range (maximum transmission distance) the CATV system 1xe2x80x2 covers, for example, assumes approximately 20 km through the following calculation if the M channel receive range in the up-frame is considered as shown in FIGS. 61A and 61B.
xe2x80x9cM channel windowxe2x80x9d=1 frame(8,192 bits)xe2x88x92(Cch+Dch+Bchxc3x9724 bits)=8,192xe2x88x92(532+276+276xc3x9724)bits=760 bits
Now, since the area that the M channel itself takes within the xe2x80x9cM channel windowxe2x80x9d is 108 bits (see FIG. 47), the M channel variation allowable area results in 760xe2x88x92108=652 bits. In this system 1xe2x80x2, the transmission rate per bit of the up-frame is xc2xc of that of the down-frame (8.192 Mbps) (that is, 2.048 Mbps), and therefore, when the aforesaid variation allowable area is converted into time, the following result is attainable.
652xc3x97(1÷2,048,000)=318.3(xcexcs)
In this case, since the time to be taken when a signal advances by 1 m (meter) in the transmission line 8 (coaxial cable) assumes 6 ns (nanosecond) in the worst case, the maximum transmission distance (the going and returning distance between the CAM 2xe2x80x2 and the CAU 4-i) is as follows.
xe2x80x83318.3(xcexcs)÷6(ns/m), that is, approximately 53 (km)
Accordingly, the maximum transmission distance between the CAM 2xe2x80x2 and the CAU 4-i results in 53÷2=26.5 km, and will come to approximately 20 km if considering a margin.
Meanwhile, recently, the following requirements (1) and (2) exist on the market in terms of the above-described two-way CATV system 1xe2x80x2:
(1) a request for the xe2x80x9cM channel windowxe2x80x9d taking a wider range to cover a larger area such as an agricultural district as a service area; and
(2) a strong request for the enhancement of the C channel throughput by the enlargement of the C channel band or the like with relation to the increase in the use of the LAN communication.
However, in the above-described two-way CATV system 1xe2x80x2, as shown in FIG. 46, the CAM 2xe2x80x2 is designed to receive the xe2x80x9cM channel windowxe2x80x9d being the M channel (varying channel) receive allowable (possible) period in a state of completely distinguishing from the service channels such as the C, D and B channels [that is, when the reception of the M channel is not detected within the xe2x80x9cM channel windowxe2x80x9d, the system basic clock (CKM) is unconditionally used as the sampling clock (ADCK)], and therefore, meeting the above-mentioned requirements (1) and (2) creates the following problems:
(1) Enlarging the range of the xe2x80x9cM channel windowxe2x80x9d requires the reduction of the band for the service channel (for example, the C channel), which causes the impairment of the service (LAN communication service); and
(2) Widening the band for the C channel requires the reduction of the range of the xe2x80x9cM channel windowxe2x80x9d, so that the maximum distance between the CAM 2xe2x80x2 and the CAU 4-i becomes short, which makes it difficult to cover a wide area as the service area.
The present invention has been developed with a view to eliminating the above-mentioned undesirable problems, and it is therefore an object of this invention to provide a time division multiple access communication system, a signal receiving method for use in the time division multiple access communication system, and a center unit to be employed in the time division multiple access communication system, which are capable of receiving a varying channel signal during a period of the reception of a fixed channel signal to prolong a variation allowable period of a varying channel without having any adverse influence on the receive period (band) of the fixed channel so that the distance between the center unit and a subscriber"" unit is extensible.
For this purpose, in accordance with the present invention, there is provided a time division multiple access communication system comprising a plurality of subscriber""s units and a center unit for performing a time division multiple access communication with respect to these subscriber""s units, with a synchronization establishing signal being exchanged between the center unit and each of the subscriber""s units for establishing the synchronization in the communication between the center unit and the subscriber""s unit so that the subscriber""s unit controls its own signal transmission timing to establish the synchronization of the communication with the center unit, wherein the center unit includes a channel receiving section for receiving the synchronization establishing signal from the subscriber""s unit, whose receive timing is variable in accordance with a distance from the subscriber""s unit, as a varying channel signal while receiving, as a fixed channel signal, a communication signal from the synchronization established subscriber""s unit at a constant or predetermined timing, and further includes a control section for controlling receive processing in the channel receiving section so that the varying channel signal is receivable during a fixed channel receive period for receiving the fixed channel signal.
Furthermore, in accordance with this invention, there is provided a signal receiving method for use in a time division multiple access communication system comprising a plurality of subscriber""s units and a center unit for performing a time division multiple access communication with respect to these subscriber""s units, with a synchronization establishing signal being exchanged between the center unit and each of the subscriber""s units for establishing the synchronization in the communication between the center unit and the subscriber""s unit so that the subscriber""s unit controls its own signal transmission timing to establish the synchronization in the communication with the center unit, wherein, when the center unit receives the synchronization establishing signal from the subscriber""s unit, whose receive timing is variable in accordance with a distance from the subscriber""s unit, as a varying channel signal while receiving, as a fixed channel signal, a communication signal from the synchronization established subscriber""s unit at a constant timing, the reception of the varying channel signal takes place during a fixed channel receive period taken for receiving the fixed channel signal.
Still further, in accordance with this invention, there is provided a center unit for use in a time division multiple access communication system which comprises a plurality of subscriber""s units, with a synchronization establishing signal being exchanged to/from each of the subscriber""s units for establishing the synchronization in the communication so that the subscriber""s unit controls its own signal transmission timing to establish the synchronization in the communication, the center unit comprising a channel receiving section for receiving the synchronization establishing signal from the subscriber""s unit, whose receive timing is variable in accordance with a distance from the subscriber""s unit, as a varying channel signal while receiving, as a fixed channel signal, a communication signal from the synchronization established subscriber""s unit at a constant timing, and further comprising a control section for controlling receive processing in the channel receiving section so that the varying channel signal is receivable during a fixed channel receive period for receiving the fixed channel signal.
Thus, since the center unit can receive the varying channel signal from the subscriber""s unit during the fixed channel receive period of receiving the fixed channel signal from the synchronization established subscriber""s unit, it is possible to sharply prolong the receive allowable period of the varying channel signal as compared with before without having any adverse influence on the receive period of the fixed channel signal. Accordingly, this invention can construct a time division multiple access communication system which ensures a minimum of band necessary for the fixed channel signal while sharply extending the maximum distance between the center unit and the subscriber""s unit to accommodate a wide area.
In this case, the center unit includes a varying channel receive detecting section for detecting the reception of the varying channel signal and a fixed channel receive detecting section for detecting the reception of the fixed channel signal, and when the varying channel receive detecting section detects the reception of the varying channel signal during the fixed channel receive period, the control section controls the receive processing in the channel receiving section to receive that varying channel signal. On the other hand, when the fixed channel receive detecting section detects the reception of the fixed channel signal during the fixed channel receive period, the control section controls the receive processing in the channel receiving section to receive that fixed channel signal.
Thus, the center unit can conduct the varying channel signal receive processing in response to the detection of the reception of the varying channel signal during the fixed channel receive period while performing the fixed channel signal receive processing in response to the detection of the reception of the fixed channel signal during the fixed channel receive period. Accordingly, the varying channel signal is certainly receivable even during the fixed channel receive period.
At this time, in the center unit, an arbitrary period other than the period for the reception of the varying channel signal from the synchronization established subscriber""s terminal is set as the fixed channel receive period, and when the varying channel signal is received during this period, the probability that the varying channel signal and the fixed channel signal are received in an overlapping condition lowers, and therefore, the reliability of the receive processing on the respective channel signals improves. In addition, in this case, since the fixed channel receive period can properly be extended within the period other than the period for the reception of the varying channel signal from the synchronization established subscriber""s terminal, the enhancement of the throughput of the fixed channel signal takes place to improve the service in the communications.
Moreover, it is also appropriate that, in the case that the varying channel signal and the fixed channel signal are received in an overlapping condition within the fixed channel receive period, the center unit sends a request for stopping the transmission of the fixed channel signal to the synchronization established subscriber""s unit, while the subscriber""s unit stops the transmission of the fixed channel signal when receiving this request from the center unit.
With this configuration, it is possible to avoid the situation that the varying channel signal from the synchronization non-established subscriber""s unit is not received in a normal way to thus make it indefinitely difficult to establish the synchronization with the same subscriber""s unit, which greatly contributes to the improvement of the reliability on the entire system.
If the fixed channel receive period is set to coincide with the receive period of a channel signal in packet communication, not only the varying channel signal receive allowable period is extensible, but also the band for the packet communication is extensible to enhance its throughput, so that the service in the packet communication is improvable.
Furthermore, if the fixed channel receive period is set to coincide with a period for the reception of a portion of a plurality of packet communication channel signals, there is a possibility that a portion of the channel signals is not normally received because of overlapping with the reception of the varying channel signal. For this reason, it is also possible to make a difference in communication charge between the use of a portion of channels (lines) and the use of the other channels, for example, to set the communication charge in the packet communication using the portion of the channels cheaper than the charge in the packet communication using the other channels. Thus, it is possible to flexibly offer the communication service in answer to the needs from the users.
Still further, if the fixed channel receive period is set to be the receive period of a call control channel signal, likewise, not only the varying channel signal receive allowable period is extensible, but also the band for the call control communication can be extended to enhance its throughput, so that the call control processing can be speedy.
Besides, if the fixed channel receive period is set to be the receive period of a portion of a plurality of call control channel signals, even in this case, for examples it is possible to make a difference in communication charge between a portion of channels and the other channels, so that offering the flexible communication service to the needs from the users becomes possible.
Moreover, if the fixed channel receive period is set to be the receive period of a data communication channel signal, in addition to prolonging the varying channel signal receive allowable period, the band for the data communication can be extended to enhance its throughput, with the result that the service in the data communication is improvable.
Still further, if the fixed channel receive period is set to be the receive period of a portion of a plurality of data communication channel signals, even in this case, for example, it is possible to make a difference in communication charge between a portion of channels and the other channels, so that offering the flexible communication service to the needs from the users becomes possible.
Still further, if the fixed channel receive period is set to be the receive period of a plurality of channel signals different in application from each other, in addition to prolonging the varying channel signal receive allowable period, each of the bands for the different types of communication can be extended to enhance the throughput in each communication, which allows the improvement of the service in each communication and the offering of more flexible communication service to the needs from the users.
If the aforesaid plurality of channel signals comprise an arbitrary combination of a packet communication channel signal(s), a call control channel signal(s) and a data communication channel signal(s), to the needs from the users, the band for one arbitrarily selected from the packet communication, the call control communication and data communication can be extended to enhance the throughput in each communication.